Short channel effect (SCE) and high leakage current are getting serious in small feature-size device components when the transistors manufactured on a semiconductor substrate have a size down to 20-30 nanometers (nm). To obtain larger on-current, higher carriers mobility and lower sub-threshold swing, some specific technologies, such as novel lithography, ultra-thin gate dielectric layer, ultra-shallow junction (USJ), control of ion implantation on substrate and high dielectric constant material/metal gate, are developed. However, the manufacturing processes developed from the aforementioned technologies have faced some specific difficulties and bottlenecks.
Thus, a technical mean of silicon on insulator (SOI)/germanium on insulator (GOI) combined with fin transistor (FinFET) and gate-all-around (GAA) has been developed. Because the aforementioned technical mean has higher gate coverage and an improved gate control, the short channel effect can be effectively reduced. In addition, the substrate leakage current is also reduced when a fully depletion device element is formed by reducing the thickness of the silicon/germanium on an insulating material layer into a specific value (for example, smaller than 10 nm). By using the device component formed with undoped channel, the low field mobility and the threshold voltage variations are also improved and the random dopant fluctuation effects are reduced. In addition, the transistor operation speed is also improved by the advantages of buried oxide and no source/drain junction capacitance. Thus, the fully-depletion device elements with SOI/GOI structures have clearly become a mainstream trend in the next generation of high-performance device components.
Even the ultra-thin flat SOI/GOI has the aforementioned device component integration advantages, there still exists some difficulties, such as a high manufacturing cost, for the fabrication of the ultra-thin flat silicon/germanium thin film channel layer with a thickness smaller than 10 nm. For example, because a surface may be damaged by hits of oxygen ions during SOI/GOI process and the surface defects and charges accumulation in neutral zone may lead to the floating body effect and the kink effect, the threshold voltage may have abnormal changes in the transistor manufacture process.
Thus, it is quite necessary to solve the aforementioned issues.